Combinatorial Delay of a CLB-Max:
ECCN Code:
Height:
JESD-609 Code:
Max Frequency:
Number of CLBs:
Number of Gates:
Number of LABs/CLBs:
Number of Logic Blocks (LABs):
Number of Logic Cells:
Number of Logic Elements/Cells:
Number of Outputs:
Number of Registers:
Number of Terminations:
Operating Supply Voltage:
Peak Reflow Temperature (Cel):
Pin Count:
RAM Size:
Supply Voltage:
Terminal Finish:
Terminal Form:
Terminal Pitch:
Terminal Position:
Time@Peak Reflow Temperature-Max (s):
Total RAM Bits:
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